Publications

Books

Book Chapters: 9

2018

- Mário Pereira Véstias, High-Performance Reconfigurable Computing, chapter of Advanced Methodologies and Technologies in Network Architecture, Mobile Computing, and Data Analytics (Advances in Computer and Electrical Engineering) 1st Edition, Oct. 2018 [bibTex]
- Mário Pereira Véstias, Advanced Methodologies and Technologies in Network Architecture, Mobile Computing, and Data Analytics (Advances in Computer and Electrical Engineering, chapter of Viterbi Decoder in Hardware, Oct. 2018, IGIGlobal [bibTex]

2017

- Mário Pereira Véstias, Adaptive Networks for on-Chip Communication, chapter of Encyclopedia of Information Science and Technology, Fourth edition, Edited by Mehdi Khosrow-Pour, Jul. 2017 [bibTex]
- Mário Pereira Véstias, Decimal Hardware Multiplier, chapter of Encyclopedia of Information Science and Technology, Fourth edition, Edited by Mehdi Khosrow-Pour Publisher, Jul. 2017 [bibTex]
- João Dias Lopes and José T. de Sousa, Versat, a minimal coarse-grain array, chapter of High Performance Computing for Computational Science VECPAR 2016, Jul. 2017, Springer [bibTex]
- Mário Pereira Véstias, Encyclopedia of Information Science and Technology, chapter of Adaptive Networks for on-Chip Communication, Jun. 2017, Mehdi Khosrow-Pour Publisher: [bibTex]
- Mário Pereira Véstias, Encyclopedia of Information Science and Technology, chapter of Decimal Hardware Multiplier, Jun. 2017, Mehdi Khosrow-Pour Publisher: [bibTex]
- Mário Pereira Véstias, Encyclopedia of Information Science and Technology, chapter of High-Performance Reconfigurable Computing, Jun. 2017, Mehdi Khosrow-Pour Publisher: [bibTex]
- Mário Pereira Véstias, Encyclopedia of Information Science and Technology, chapter of Viterbi Decoder in Hardware, Jun. 2017, Mehdi Khosrow-Pour Publisher: [bibTex]

Articles

International Journal Articles: 3

2018

- Mário Pereira Véstias and Horácio C. Neto, Improving the area of fast parallel decimal multipliers, article in Microprocessors and Microsystems vol. 61 pp. 96-107, Sep. 2018, Elsevier [DOI Article link] [bibTex]

2017

- Horácio C. Neto and Mário Pereira Véstias, Decimal addition on FPGA based on a mixed BCD/excess-6 representation, article in Microprocessors and Microsystems vol. 55 pp. 91-99, Nov. 2017, Elsevier [DOI Article link] [bibTex]
- Rui Policarpo Duarte and J Oliveira, J Soares, AR Lourenço, Intelligent Sensors for Real-Time Hazard Detection and Visual Indication on Highways, article in i-ETC: ISEL Academic Journal of Electronics Telecommunications and Computers vol. 3, Oct. 2017 [bibTex]

International Conferences: 13

2019

- Luís Fiolhais and Fernando Manuel Duarte Gonçalves and Rui Policarpo Duarte and Mário Pereira Véstias and José T. de Sousa, Low Energy Heterogeneous Computing with Multiple RISC-V and CGRA Cores, presented at IEEE International Symposium on Circuits and Systems, May. 2019 [bibTex]
- Ana Gonçalves and Tiago Peres and Mário Pereira Véstias, Exploring Data Bitwidth to Run Convolutional Neural Networks in Low Density FPGAs, presented at International Symposium on Applied Reconfigurable Computing, Apr. 2019 [bibTex]
- Tiago Peres and Ana Gonçalves and Mário Pereira Véstias, Faster Convolutional Neural Networks in Low Density FPGAs using Block Pruning, presented at International Symposium on Applied Reconfigurable Computing, Apr. 2019 [bibTex]

2018

- Rui Policarpo Duarte and Horácio C. Neto, Stochastic processors on FPGAs to compute sensor data towards fault-tolerant IoT systems, Dec. 2018 [bibTex]
- José Nascimento and Rui Policarpo Duarte and Mário Pereira Véstias, Hyperspectral compressive sensing: a low-power consumption approach, presented at Proeedings of SPIE, Nov. 2018 [bibTex]
- Rui Policarpo Duarte and Mário Pereira Véstias and Horácio C. Neto, Rapid Prototyping of Approximate Signal Processing Using Stochastic Processors on FPGAs, presented at International Conference on Design and Architectures for Signal and Image Processing, Oct. 2018 [bibTex]
- Rui Policarpo Duarte and Rui Miguel Carrasqueiro Henriques and Horácio C. Neto, FPGA-based OpenCL Accelerator for Discovering Temporal Patterns in Gene Expression Data Using Biclustering', presented at PBio 2018 Proceedings of the 6th International Workshop on Parallelism in Bioinformatics , Sep. 2018 [DOI Article link] [bibTex]
- Luís Filipe Azenhas Fiolhais and Horácio C. Neto, An Efficient Exact Fused Dot Product Processor in FPGA, presented at International Conference on Field Programmable Logic and Applications (FPL), Aug. 2018 [DOI Article link] [bibTex]
- Mário Pereira Véstias and Rui Policarpo Duarte and José T. de Sousa and Horácio C. Neto, Lite-CNN: A High-Performance Architecture to Execute CNNs in Low Density FPGAs, presented at International Conference on Field Programmable Logic and Applications (FPL), Aug. 2018 [DOI Article link] [bibTex]

2017

- João Dias Lopes and José T. de Sousa, Fast Fourier Transform on the Versat CGRA, presented at Jornadas Sarteco, Sep. 2017 [bibTex]
- João Dias Lopes and José T. de Sousa and Mário Pereira Véstias and Horácio C. Neto, K-means clustering on CGRA, presented at International Conference on Field Programmable Logic and Applications (FPL), Sep. 2017 [DOI Article link] [bibTex]
- Rui Policarpo Duarte and Mário Pereira Véstias and Horácio C. Neto, On the Computation of Approximation Coefficients in ROM-based Redundancy for SEU Mitigation on FPGAs, presented at Workshop on Reliable Field Programmable Logic, Sep. 2017 [bibTex]
- Mário Pereira Véstias and Rui Policarpo Duarte and José T. de Sousa and Horácio C. Neto, Parallel dot-products for deep learning on FPGA, presented at International Conference on Field Programmable Logic and Applications (FPL), Sep. 2017 [DOI Article link] [bibTex]

National Conferences: 6

2019

- Tiago Peres and Ana Gonçalves and Mário Pereira Véstias, Otimização de Redes Neuronais Convolucionais em FPGA com Redução do Tamanho dos Operandos, presented at XV Jornadas sobre SIstemas Reconfiguráveis, Feb. 2019 [bibTex]
- Ana Gonçalves and Tiago Peres and Mário Pereira Véstias, Otimização de Redes Neuronais Convolucionais em FPGA com Redução do Tamanho dos Operandos, presented at XV Jornadas sobre SIstemas Reconfiguráveis, Feb. 2019 [bibTex]

2018

- Horácio C. Neto and Rui Policarpo Duarte and Mário Pereira Véstias and César Gouveia, CNN-Based Traffic-Sign Detection on FPGAs, presented at Jornadas sobre SIstemas Reconfiguráveis, Feb. 2018 [bibTex]
- Mário Pereira Véstias and Rui Policarpo Duarte and José T. de Sousa and Horácio C. Neto, Implementação Eficiente de Múltiplos Produtos Internos com DSP, presented at Jornadas sobre SIstemas Reconfiguráveis, Feb. 2018 [bibTex]

2017

- Mário Pereira Véstias and Rui Policarpo Duarte, Top-down Learning of Embedded Systems Design on FPGA, presented at Jornadas sobre SIstemas Reconfiguráveis, Feb. 2017 [bibTex]
- Rui Manuel Alves Santiago and José T. de Sousa and João Dias Lopes, Compiler for the Versat Architecture, presented at XIIII Jornadas de Sistemas Reconfiguráveis, Jan. 2017 [DOI Article link] [bibTex]

Dissertations

MSc Theses: 9

2019

- Dinis Pedro Pinto Marcos Madeira advised by Rui Policarpo Duarte and J. Monteiro, Processador Didático P4 - Especificação e Implementação do Processador e Ambiente de Desenvolvimento, MSc Thesis at Universidade de Lisboa, May. 2019 [bibTex]

2018

- Ana Gonçalves advised by Mário Pereira Véstias, Otimização de Redes Neurais Convolucionais em FPGA com Redução do Tamanho dos Operandos, MSc Thesis at Instituto Superior de Engenharia de Lisboa, Dec. 2018 [bibTex]
- Tiago Peres advised by Mário Pereira Véstias, Otimização de Redes Neurais Convolucionais na FPGA utilizando Técnicas de Compressão, MSc Thesis at Instituto Superior de Engenharia de Lisboa, Dec. 2018 [bibTex]
- Helena Alexandra Sabala Ruivo da Cruz advised by Rui Policarpo Duarte and Horácio C. Neto, On-Board Multi-core Fault-Tolerant SAR Imaging Architecture, MSc Thesis at Instituto Superior Técnico, Nov. 2018 [bibTex]
- Nik Orter advised by Mário Pereira Véstias, Embedded System for Gym and Fitness Centers, MSc Thesis at Instituto Superior de Engenharia de Lisboa, Jul. 2018 [bibTex]
- Martinho Dias advised by Mário Pereira Véstias, Implementação de filtros de imagem em FPGA usando ferramentas de síntese de alto nível, MSc Thesis at Instituto Superior de Engenharia de Lisboa, Jul. 2018 [bibTex]

2017

- Luís Filipe Azenhas Fiolhais advised by Horácio C. Neto, Exact Inner Product Processor in FPGA, MSc Thesis at IST, Nov. 2017 [bibTex]
- Hamid Kanpour advised by Mário Pereira Véstias, MPLS Layer 3 VPN, MSc Thesis at Instituto Superior de Engenharia de Lisboa, Sep. 2017 [bibTex]
- Gonçalo César Mendes Ribeiro advised by Horácio C. Neto, Data Compression Algorithms in FPGAs, MSc Thesis at IST, May. 2017 [bibTex]

as Editors

Other Publications: 1

2017

- Rui Policarpo Duarte and Daniel Porto and João Ferreira Loff and Rodrigo Rodrigues and Luis Ceze, editors, Making data center computations fast, but not so furious, Apr. 2017 [bibTex]