Publications

Books

Book Chapters: 5

2017

- João Dias Lopes and José T. de Sousa, Versat, a minimal coarse-grain array, chapter of High Performance Computing for Computational Science VECPAR 2016, Jul. 2017, Springer [bibTex]
- Mário Pereira Véstias, Encyclopedia of Information Science and Technology, chapter of Adaptive Networks for on-Chip Communication, Jun. 2017, Mehdi Khosrow-Pour Publisher: [bibTex]
- Mário Pereira Véstias, Encyclopedia of Information Science and Technology, chapter of Decimal Hardware Multiplier, Jun. 2017, Mehdi Khosrow-Pour Publisher: [bibTex]
- Mário Pereira Véstias, Encyclopedia of Information Science and Technology, chapter of High-Performance Reconfigurable Computing, Jun. 2017, Mehdi Khosrow-Pour Publisher: [bibTex]
- Mário Pereira Véstias, Encyclopedia of Information Science and Technology, chapter of Viterbi Decoder in Hardware, Jun. 2017, Mehdi Khosrow-Pour Publisher: [bibTex]

Articles

International Journal Articles: 3

2018

- Mário Pereira Véstias and Horácio C. Neto, Improving the area of fast parallel decimal multipliers, article in Microprocessors and Microsystems vol. 61 pp. 96-107, Sep. 2018, Elsevier [DOI Article link] [bibTex]

2017

- Horácio C. Neto and Mário Pereira Véstias, Decimal addition on FPGA based on a mixed BCD/excess-6 representation, article in Microprocessors and Microsystems vol. 55 pp. 91-99, Nov. 2017, Elsevier [DOI Article link] [bibTex]
- Rui Policarpo Duarte and J Oliveira, J Soares, AR Lourenço, Intelligent Sensors for Real-Time Hazard Detection and Visual Indication on Highways, article in i-ETC: ISEL Academic Journal of Electronics Telecommunications and Computers vol. 3, Oct. 2017 [bibTex]

International Conferences: 6

2018

- Luís Filipe Azenhas Fiolhais and Horácio C. Neto, An Efficient Exact Fused Dot Product Processor in FPGA, presented at International Conference on Field Programmable Logic and Applications (FPL), Aug. 2018 [DOI Article link] [bibTex]
- Mário Pereira Véstias and Rui Policarpo Duarte and José T. de Sousa and Horácio C. Neto, Lite-CNN: A High-Performance Architecture to Execute CNNs in Low Density FPGAs, presented at International Conference on Field Programmable Logic and Applications (FPL), Aug. 2018 [DOI Article link] [bibTex]

2017

- João Dias Lopes and José T. de Sousa, Fast Fourier Transform on the Versat CGRA, presented at Jornadas Sarteco, Sep. 2017 [bibTex]
- João Dias Lopes and José T. de Sousa and Mário Pereira Véstias and Horácio C. Neto, K-means clustering on CGRA, presented at International Conference on Field Programmable Logic and Applications (FPL), Sep. 2017 [DOI Article link] [bibTex]
- Rui Policarpo Duarte and Mário Pereira Véstias and Horácio C. Neto, On the Computaiton of Approximation Coefficients in ROM-based Redundancy for SEU Mitigation on FPGAs, presented at Workshop on Reliable Field Programmable Logic, Sep. 2017 [bibTex]
- Mário Pereira Véstias and Rui Policarpo Duarte and José T. de Sousa and Horácio C. Neto, Parallel dot-products for deep learning on FPGA, presented at International Conference on Field Programmable Logic and Applications (FPL), Sep. 2017 [DOI Article link] [bibTex]

National Conferences: 4

2018

- Horácio C. Neto and Rui Policarpo Duarte and Mário Pereira Véstias and César Gouveia, CNN-Based Traffic-Sign Detection on FPGAs, presented at Jornadas sobre SIstemas Reconfiguráveis, Feb. 2018 [bibTex]
- Mário Pereira Véstias and Rui Policarpo Duarte and José T. de Sousa and Horácio C. Neto, Implementação Eficiente de Múltiplos Produtos Internos com DSP, presented at Jornadas sobre SIstemas Reconfiguráveis, Feb. 2018 [bibTex]

2017

- Mário Pereira Véstias and Rui Policarpo Duarte, Top-down Learning of Embedded Systems Design on FPGA, presented at Jornadas sobre SIstemas Reconfiguráveis, Feb. 2017 [bibTex]
- Rui Manuel Alves Santiago and José T. de Sousa and João Dias Lopes, Compiler for the Versat Architecture, presented at XIIII Jornadas de Sistemas Reconfiguráveis, Jan. 2017 [DOI Article link] [bibTex]

Dissertations

MSc Theses: 3

2017

- Luís Filipe Azenhas Fiolhais advised by Horácio C. Neto, Exact Inner Product Processor in FPGA, MSc Thesis at IST, Nov. 2017 [bibTex]
- Hamid Kanpour advised by Mário Pereira Véstias, MPLS Layer 3 VPN, MSc Thesis at Instituto Superior de Engenharia de Lisboa, Sep. 2017 [bibTex]
- Gonçalo César Mendes Ribeiro advised by Horácio C. Neto, Data Compression Algorithms in FPGAs, MSc Thesis at IST, May. 2017 [bibTex]

as Editors

Other Publications: 1

2017

- Rui Policarpo Duarte and Daniel Porto and João Ferreira Loff and Rodrigo Rodrigues and Luis Ceze, editors, Making data center computations fast, but not so furious, Apr. 2017 [bibTex]