Supervisions

PhD Theses

PhD Theses: 3

Arquitectura Reconfigurável de Muitos Núcleos para a Execução Eficaz de Aplicações de Cálculo Científico
PhD Thesis at Instituto Superior Técnico, work in progress [bibTex]
Functional verification of multi-core processors by combining software simulation with custom configurable hardware emulation techniques
PhD Thesis at Department of Computer Science and Engineering, IST, work in progress [bibTex]
Victor Manuel Gonçalves Martins
Investigação e Concepção de uma Arquitectura BIST
PhD Thesis, work in progress [bibTex]

MSc Theses

MSc Theses: 19

Carlos Alexandre Antunes Rodrigues
Ambiente de Desenvolvimento para Processador Open Risk
MSc Thesis, work in progress [bibTex]
João Filipe Mota
Advisors: Helena Sarmento
An Industrial IoT application using the Zynq Soc FPGA
MSc Thesis, work in progress [bibTex]
Helena Alexandra Sabala Ruivo da Cruz
Arquitectura Cross-Layer Hardware/Software para Sistemas SpaceWire tolerantes a erros
MSc Thesis, work in progress [bibTex]
Duarte Nuno Gomes Botelho
Complementary environment, passenger and vehicle monitoring for improved Advanced Driver-Assistance Systems (ADAS)
MSc Thesis, work in progress [bibTex]
Edson Lucas Faustino Afonso
Advisors: Helena Sarmento
Current and Voltage sensors fot the Smart Grid
MSc Thesis, work in progress [bibTex]
Maxim Hariton
Deep Architecture for the Versat Reconfigurable Processor
MSc Thesis, work in progress [bibTex]
Dinis Pedro Pinto Marcos Madeira
Desenvolvimento do Sistema Didático para o Processador P4
MSc Thesis, work in progress [bibTex]
Fraancisco Tamborino Casimiro Nunes
Estágio 1 - Colocar o processador OpenRISC (versão OR1200) a trabalhar numa FPGA Atlys da Xilinx
MSc Thesis, work in progress [bibTex]
Beatriz Alves Martins
Estudo de Soluções de Aquisição, Processamento e Transmissão de Sinais EEG e ECG via BLE.
MSc Thesis, work in progress [bibTex]
Alberto de Jesus da Cruz Monteiro
Faul Tolerant Digital Controler for Solar Power Regulater for Satellite/Space Speditions
MSc Thesis, work in progress [bibTex]
César Augusto Pereira Jesus Gouveia
FPGA- Based Traffic-Sign Detection and Classification
MSc Thesis, work in progress [bibTex]
João Gonçalo Esteves Freire Cardoso
FPGA- PNG Encoder
MSc Thesis, work in progress [bibTex]
Rafael Carrega Mendes
Hardware Evolutivo
MSc Thesis, work in progress [bibTex]
Miguel Henrique da Conceição Alóvia de Pina Cardoso
High-Level Hardware Synthesis of Deep Neural Networks
MSc Thesis, work in progress [bibTex]
Tiago Filipe Grilo Ferreira
Implementação em Verilog do Link-Layer do Bluetooth Low Energy
MSc Thesis, work in progress [bibTex]
António Gonçalves Vian Costa
Advisors: Helena Sarmento
Internet of Things for the Smart Home
MSc Thesis, work in progress [bibTex]
Álvaro Filipe Lopes Simões
Programação de um acelerador em OpenCL para extração de padrões temporais em expressões genéticas baseado em biclustering
MSc Thesis, work in progress [bibTex]
Guilherme Cruz Gil de Lima
Sistema de classificação de veículos automoveis com redes neuronais em FPGA
MSc Thesis at IST, work in progress [bibTex]
Ricardo Rodrigues Carvalho
SoC - FPGA Monte Carlo tree seach Multiprocessor
MSc Thesis, work in progress [bibTex]

Graduations

Graduation Theses: 1

Sistema Embebido para Navegação Autónoma de Robôs
Graduation Thesis, work in progress [bibTex]