author = "J. Portela and J. Monteiro",
   title = "Power Optimized Viterbi Decoder Implementation through Architectural Transforms",
   booktitle = "XIV Symposium on Integrated Circuits and Systems Design",
   pages = "212-217",
   location = "Bras{\'\i}lia, Brasil",
   year = 2001,
   month = sep,
   BibTexOrigem = "1187 www.Inesc-ID.pt 2019-06-18"

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