Co-VAlidatioN Tool for Embedded Systems (Cervantes)

Type: National Project

Duration: from 2012 Mar 01 to 2015 Feb 28

Financed by: FCT

Prime Contractor: INESC-ID (Other)

Project Web Site:

In this project we propose to work at the system-level validation and produce a tool to automatically generate input test vectors, from a system-level description in SystemC, that allows a user-specified coverage to be obtained. We propose also to apply our methodology to the interaction between a hardware part described in SystemC with an Instruction Set Simulator which is running the software part. Hence obtaining true hardware/software co-validation.


  • INESC-ID (Other)

Principal Investigators