Category: Seminar

Compiler-Directed Caching in FPGAs using RAM Blocks

Pedro Diniz, University of Southern California – Abstract: Configurable architectures, such as Field-Programmable-Gate-Arrays (FPGAs) offer the promise of substantial performance improvements over conventional processors by allowing the implementation of application-specific datapaths that exploit instruction-level parallelism or domain-specific numeric formats and operations. Unfortunately FPGAs are still…

”TEAMING UP HUMAN AND SYNTHETIC CHARACTERS”

Rui Prada, Departamento de Engenharia Informática – Abstract: With the emergence of synthetic characters, collaborative virtual environments can now be populated with these characters and users at the same time, all interacting, collaborating or competing with each other. However, the user’s interaction with the synthetic…

“SISTEMAS DE INFORMAÇÃO DE GESTÃO DE BALANCED SCORECARD – ESTADO DA ARTE, SELECÇÃO, IMPLEMENTAÇÃO E ALINHAMENTO COM A AQRQUITECTURA DA EMPRESA”

José Jorge Carranca Sequeira Martins, Departamento de Engenharia Informática – Abstract: O Balanced Scorecard (BSc), formulado em 1989 por Kaplan e Norton, emergiu como uma ferramenta de medição de desempenho e de planeamento estratégico corporativo, sendo já adoptado na maioria das empresas representadas no Fortune…

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