Talk1:The OpenRISC experience & Talk2:Machine Guided Energy Efficient Compilation
Dr. Jeremy Bennett ,
Embecosm, UK –
Dr. Jeremy Bennett brings us two short lectures: the first one is under the theme “Free softcores, tools and toolchains: The OpenRISC experience”, the second short lecture is about “MAGEEC: Machine Guided Energy Efficient Compilation”.
Free softcores, tools and toolchains: The OpenRISC experience:
In this talk we will look at the availability of free and open source
softcores, EDA tools and compiler tool chains. Central to this will be a
presentation of the OpenRISC 1000, a fully open 32/64-bit RISC processor
architecture. Inspired by the MIPS and DLX architectures, the OpenRISC
1000 has many Verilog implementations and is used in a wide range of
commercial products including Samsung set top boxes, NXP Jennic Zigbee
chips and NASA’s TechEdSat, which flew in 2012/13.
In addition to the design and Verilog implementations being fully open,
the processor is supported by open source front-end EDA tools such as
Icarus Verilog and Verilator. It has a comprehensive and robust GNU tool
chain, with an experimental LLVM tool chain also available. Linux and a
wide-range of RTOS are supported.
As well as describing the engineering implementation, the talk will look
at how such an open design has been successful in a commercial
environment, the business models that are most appropriate to such an
open source approach, and where such business models can fail.
MAGEEC: Machine Guided Energy Efficient Compilation:
We are used to compilers which optimize for execution speed, and (in the embedded sector) for code size. In 2012 James Pallister of Bristol University and Embecosm led the seminal research project which demonstrated conclusively that compiler optimization has a major impact on the energy consumed by the generated code (http://comjnl.oxfordjournals.org/content/early/2013/11/11/comjnl.bxt129.abstract?keytype=ref&ijkey=aA4RYlYQLNVgkE3). This finding has immense potential for data center power usage, for battery life of consumer devices, for the efficiency of devices relying on energy scavenging and for remote sensing, where batteries must last for years at a time. In this short talk, we will explore how compiled programs consume energy and the opportunities for compiler optimization to reduce energy consumption. We will provide an introduction to MAGEEC, an 18-month project supported by the UK Technology Strategy Board, which uses machine learning to select compiler optimizations that will yield the most energy efficient compiled code.
Dr Jeremy Bennett is Embecosm’s founder, an expert on silicon chip
modeling, source level debuggers and compilers, for which Embecosm
provides commercial support services. A former academic, Jeremy holds a
MA and PhD from Cambridge University and is a Member of the British
Computer Society, Chartered Engineer, Chartered Information Technology
Professional and Fellow of the Royal Society of Arts. He is the author
of the standard textbook, “Introduction to Compiling Techniques”
(McGraw-Hill 1990, 1996, 2003).
José João Henriques Teixeira de Sousa
Anfiteatro do Complexo Interdisciplinar no IST
INESC-ID ESR Talks – April 2023
If you are a masters/PhD student or a postdoctoral fellow, come and present your work in an informal and friendly environment – and savour some tasty snacks!
Individual talks will be 10-15 minutes plus time for feedback. Enroll on your selected date by emailing pedro.ferreira[at]inesc-id.pt.
Happening on the second Wednesday of every month (4pm-5pm):
- 12 April (Alves Redol, Room 9)
- 10 May (Alves Redol, Room 9)
- 14 June (Alves Redol, Room 9)
- 12 July (Alves Redol, Room 9)
We hope to see you there!