Abstract:

Hardware implementations of cryptographic algorithms may leak some information as computing time, electromagnetic emissions and power consumption. Based on this information, some kind of attacks can be performed to recover cryptographic keys. This presentation shows two approaches to thwart some Side Channel Attacks (SCA).

The first one is an analog hardware countermeasure that counteracts SCA that not requires any modification on the cryptographic algorithm, the messages or keys.

The second method concerns a combination of reconfigurable techniques with the recently proposed Leak Resistant Arithmetic (LRA) to thwart SCA based on power analysis. The main aim of this approach is to perform modular multiplication and exponentiation, the most significant cryptographic operations, by randomly change the intermediate results of a cryptographic computation. In this way SCA based on power analysis is no longer efficient. This approach resulted in a Leak Resistant Reconfigurable Architecture (LR²A).

Both method were simulated and synthesized for the CMOS 0.18µ technology.
A short version of the LR²A was prototyped in FPGA and a SCA attack was performed to show the efficiency of the new architecture.

Date: 2006-Jun-23     Time: 14:00:00     Room: 336

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