Frederico Pratas,

Inesc-ID

Abstract:

The power consumption has become a very important metric and researchvtopic in microprocessors design in recent years. In this talk we propose a new method that reuses instructions forming small loops: the loop’s instructions are first buffered in the
Reorder Buffer and reused afterwards. The proposed method is
implemented with the introduction of two new structures in a typical
superscalar microarchitecture.
In order to evaluate the proposed method, it was implemented and its
operation simulated with the Simplescalarv tools. Several different configurations and benchmarks have been used, and the final conclusion is that the implementation of the proposed method in a superscalar microarchitecture improves the power efficiency without significantly affecting the performance.

 

Date: 2007-Sep-17     Time: 16:00:00     Room: 336


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