Lissajous based Mixed-Signal BIST and Floating Gate Monitors
Prof. Luz Balado,
Universitat Politècnica de Catalunya –
Abstract:
Novel techniques for design and Test of digital and mixed-signal circuits and defect modeling, namely using BIST (Built-In Self Test) and for physical defects induced during IC manufacturing, manifesting themselves as defective MOSFET devices (with floating gate terminals).
Luz Balado received the degree in Industrial Engineering in 1980 from the Universitat Politècnica de Catalunya (UPC) and the Doctor degree in Electronic Engineering in 1986. She is presently Associate Professor at the Electronic Engineering Department of the UPC where teaches Electronics and Electronic Instrumentation and is involved in its Microelectronics and Test research Group.
Date: 2005-Mar-18 Time: 15:00:00 Room: Room E8 – North Tower – EEC Department, IST
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