Lissajous based Mixed-Signal BIST and Floating Gate Monitors
Prof. Luz Balado,
Universitat Politècnica de Catalunya –
Abstract:
Novel techniques for design and Test of digital and mixed-signal circuits and defect modeling, namely using BIST (Built-In Self Test) and for physical defects induced during IC manufacturing, manifesting themselves as defective MOSFET devices (with floating gate terminals).
Luz Balado received the degree in Industrial Engineering in 1980 from the Universitat Politècnica de Catalunya (UPC) and the Doctor degree in Electronic Engineering in 1986. She is presently Associate Professor at the Electronic Engineering Department of the UPC where teaches Electronics and Electronic Instrumentation and is involved in its Microelectronics and Test research Group.
Date: 2005-Mar-18 Time: 15:00:00 Room: Room E8 – North Tower – EEC Department, IST
For more information:
- +351 21 31 00 254
Upcoming Events
Mathematics, Physics & Machine Learning Seminar Series (Online)

The Mathematics, Physics & Machine Learning seminar series has started on October 2020 and runs until March 2021.
The seminars aim to bring together mathematicians and physicists interested in machine learning (ML) with ML and AI experts interested in mathematics and physics, with the goal of introducing innovative Mathematics and Physics-inspired techniques in Machine Learning and, reciprocally, applying Machine Learning to problems in Mathematics and Physics.
Attendance is free but registration is required.
More information is available here.
International European Conference on Parallel and Distributed Computing

The 27th International European Conference on Parallel and Distributed Computing (Euro-Par 2021) will take from August 30 to September 3 2021 in Lisbon.
Euro-Par is the prime European conference covering all aspects of parallel and distributed processing, ranging from theory to practice, from small to the largest parallel and distributed systems and infrastructures, from fundamental computational problems to full-fledged applications, from architecture, compiler, language and interface design and implementation, to tools, support infrastructures, and application performance aspects.
The 2021 edition of Euro-Par will be organized as a collaboration between INESC-ID and Instituto Superior Técnico (IST).
Important Dates:
– Abstract Submission: February 5, 2021
– Paper Submission Deadline: February 12, 2021
– Author Notification: April 30, 2021
– Camera-Ready Papers: June 6, 2021
More information is available here.