State-of-the-Art FinFET Technology: An Industry Designer’s Perspective

Gonçalo Nogueira,
Socionext, Inc –
Abstract:
Size scaling of CMOS transistors has been happening for the past 30 years, with technologies like FinFET or FD-SOI being used recently to make up for limitations found in Bulk technology. With TSMC releasing 5nm FinFET in 2019 (with gate lengths of the order of dozens of atoms wide), design and layout are changing significantly from what is seen in older technologies. This seminar addresses the topic of FinFET from an industry designer’s perspective, with the following content: an introduction to FinFET, design and layout with FinFETs, advantages and challenges, and lastly, the expected future of solid state circuits.
Bio
Gonçalo Nogueira received the B. Sc. Degree in Engineering Sciences and the M. Sc. Degree in Electrical and Computer Engineering from Instituto Superior Técnico (IST), Universidade de Lisboa, in 2013 and 2016, respectively. He worked at INESC-ID with a research grant at the end of 2016 and since August 2017 he has been working in Socionext, Inc. developing high speed data converters with 7nm FinFET technology. His main professional interests are High Speed, R&D, Analog-and-Mixed Signal and State-of-the-Art.
Date: 2018-Sep-19 Time: 17:00:00 Room: Room EA4 North Tower, Alameda
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Upcoming Events
INESC Brussels HUB Winter Meeting 2023

This edition of the HUB Winter Meeting will be co-organised with Science Business and will take place on the 30 and 31 January, in Lisbon, at Instituto Superior Técnico, Department of Computer Science and Engineering.
Please see below a summary of the agenda, this will be updated on the INESC Brussels HUB website regularly (confirmed speakers and other relevant info). Places for onsite participation are limited so registration is mandatory. Online participants will be sent a ZOOM link for each specific session on the 27th January.
INESC Brussels HUB website: https://hub.inesc.pt/
Monday, 30 January
a) Digital Europe Programme & Chips Act: state of play and possibilities for INESC.
9h to 10h30 GMT
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c) Networking Lunch (for all onsite participants).
d) Roundtable: From rhetoric to reality – Embedding international strategy in the DNA of research organisations.
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e) Networking Dinner
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Tuesday, 31 January
f) Workshop: How they did it? Strategic positioning for structural success in Horizon Europe: a discussion of best practices.
(Exclusive for INESC researchers, administrators and international invited speakers).
g) The public consultation on European R&I Programmes: Towards FP10.
(Closed-door, roundtable workshop, Chatham House rules, open to INESC researchers and administrators, external participants by invitation only).
h) Networking Lunch (for all onsite participants).
i) Management Committee meeting (Directors and POB members)
The HUB Winter Meeting aims at bringing together researchers and administrators from the 5 INESC institutes, affiliated higher education institutions in Portugal and abroad, with key European and global players, to:
– Discuss key research and innovation issues at EU level.
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– Exchange best-practices about R&I management, career development and policy positioning.
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