Publications

Articles

International Journal Articles: 5

2020

- Mário Pereira Véstias and Rui Policarpo Duarte and José T. de Sousa and Horácio C. Neto, A Configurable Architecture for Running Hybrid Convolutional Neural Networks in Low-Density FPGAs, article in IEEE Access pp. 1-15, to appear on 2020, IEEE [DOI Article link] [bibTex]
- Mário Pereira Véstias and Rui Policarpo Duarte and José T. de Sousa and Horácio C. Neto, A fast and scalable architecture to run convolutional neural networks in low density FPGAs, article in Microprocessors and Microsystems vol. 77 (103136), Sep. 2020, Elsevier [DOI Article link] [bibTex]
- Mário Pereira Véstias and Rui Policarpo Duarte and José T. de Sousa and Horácio C. Neto, Moving Deep Learning to the Edge, article in Algorithms vol. 13 (125), May. 2020 [DOI Article link] [bibTex]

2019

- Mário Pereira Véstias and Rui Policarpo Duarte and José T. de Sousa and Horácio C. Neto, Fast Convolutional Neural Networks in Low Density FPGAs Using Zero-Skipping and Weight Pruning, article in Electronics vol. 8, Nov. 2019, MDPI [Article] [DOI Article link] [bibTex]

2018

- Marco Pereira and José T. de Sousa and João Costa Freire and João Caldinhas Vaz, A 1.7-mW -92-dBm Sensitivity Low-IF Receiver in 0.13-μm CMOS for Bluetooth LE Applications, article in IEEE Transactions on Microwave Theory and Techniques PP(99):1-15, to appear on 2018 [bibTex]

International Conferences: 3

2019

- Mário Pereira Véstias and Rui Policarpo Duarte and José T. de Sousa and Horácio C. Neto, Hybrid Dot-Product Calculation for Convolutional Neural Networks in FPGA, presented at Field-Programmable Logic and Applications (FPL), Sep. 2019 [DOI Article link] [bibTex]
- Luís Fiolhais and Fernando Manuel Duarte Gonçalves and Rui Policarpo Duarte and Mário Pereira Véstias and José T. de Sousa, Low Energy Heterogeneous Computing with Multiple RISC-V and CGRA Cores, presented at IEEE International Symposium on Circuits and Systems, May. 2019 [bibTex]

2018

- Mário Pereira Véstias and Rui Policarpo Duarte and José T. de Sousa and Horácio C. Neto, Lite-CNN: A High-Performance Architecture to Execute CNNs in Low Density FPGAs, presented at International Conference on Field Programmable Logic and Applications (FPL), Aug. 2018 [DOI Article link] [bibTex]

National Conferences: 1

2018

- Mário Pereira Véstias and Rui Policarpo Duarte and José T. de Sousa and Horácio C. Neto, Implementação Eficiente de Múltiplos Produtos Internos com DSP, presented at Jornadas sobre SIstemas Reconfiguráveis, Feb. 2018 [bibTex]

Dissertations

MSc Theses: 5

2019

- Carlos Alexandre Antunes Rodrigues advised by José T. de Sousa, Ambiente de Desenvolvimento para Processador Open Risk, MSc Thesis, Nov. 2019 [bibTex]
- Gonçalo da Conceição Reis dos Santos advised by José T. de Sousa, C Compiler for the VERSAT Reconfigurable Processor, MSc Thesis, Nov. 2019 [bibTex]
- Valter Jorge Brás Mário advised by José T. de Sousa, Deep Architecture for the Versat Reconfigurable Processor, MSc Thesis, Nov. 2019 [bibTex]
- João Gonçalo Esteves Freire Cardoso advised by José T. de Sousa, FPGA- PNG Encoder, MSc Thesis, Nov. 2019 [bibTex]
- João César Martins Moutoso Ratinho advised by José T. de Sousa, Simulator for the RV32-Versat Architecture, MSc Thesis, Nov. 2019 [bibTex]