Ongoing Supervisions

PhD Theses

PhD Theses: 1

VERSAT, a Compile-Friendly Recofigurable Processor and Architecture
PhD Thesis, work in progress [bibTex]

MSc Theses

MSc Theses: 9

João Diogo Amaro Beirão
AAC audio decoder using a RISC-V processor and hardware accelerators
MSc Thesis at IST, work in progress [bibTex]
Asynchronous Sample Rate Converter
MSc Thesis, work in progress [bibTex]
José Heraldo Furtado Fernandes
Boot loader for a RISC-V processor that uses flash memory
MSc Thesis at IST, work in progress [bibTex]
Deep Neural Network on the Versat Reconfigurable Processor
MSc Thesis at IST, work in progress [bibTex]
Floating-point unit with variable exponent/mantissa size
MSc Thesis, work in progress [bibTex]
Henrique Alves Gonçalves
MPEG1/2 layers I/II encoder using a RISC-V processor and hardware accelerators
MSc Thesis, work in progress [bibTex]
Ricardo Filipe Rafael Raposo Ferreira Raseth
MPEG1/2 layers I/II encoder using a RISC-V processor and hardware accelerators
MSc Thesis, work in progress [bibTex]
Francisco Vieira da Silva Arteiro
Object Detection and Classification for the Internet of Things
MSc Thesis at IST, work in progress [bibTex]
Rita Susana Gomes Ramos
RISC-V + HW accelerator PNG Encoder
MSc Thesis, work in progress [bibTex]

Finished Supervisions

MSc Theses

MSc Theses: 12

2021

Caraterização de Processadores RISC-V de Código Aberto
MSc Thesis at IST, Jan. 2021 [bibTex]
CGRA - Based deep neural network for object identification
MSc Thesis at IST, Jan. 2021 [bibTex]
Object Detection and Classification on the Versat Reconfigurable Processor
MSc Thesis at Instituro Superior Técnico, Jan. 2021 [bibTex]
Otimização do Algoritmo Back Propagation
MSc Thesis at Instituto Superior Técnico, Jan. 2021 [bibTex]

2020

Verilog PNG Encoder
MSc Thesis, Oct. 2020 [bibTex]
Antonio Pedro Charana e Silva
Development Environment for a RISC-V Processor
MSc Thesis, Jul. 2020 [bibTex]

2019

Ambiente de Desenvolvimento para Processador Open Risk
MSc Thesis, Nov. 2019 [bibTex]
Gonçalo da Conceição Reis dos Santos
C Compiler for the VERSAT Reconfigurable Processor
MSc Thesis, Nov. 2019 [bibTex]
Valter Jorge Brás Mário
Deep Architecture for the Versat Reconfigurable Processor
MSc Thesis, Nov. 2019 [bibTex]
FPGA- PNG Encoder
MSc Thesis, Nov. 2019 [bibTex]
João César Martins Moutoso Ratinho
Simulator for the RV32-Versat Architecture
MSc Thesis, Nov. 2019 [bibTex]
Deep Architecture for the Versat Reconfigurable Processor (Verilog)
MSc Thesis, Sep. 2019 [bibTex]

Internships

Internships: 4

2021

Estágio de Verão: Arquitetura de Computadores
short term traineeship, Jan. 2021 [bibTex]

2019

Computer Architecture
short term traineeship at IST, Sep. 2019 [bibTex]
Curso Verão: Área de Estágio:​​Arquitetura de Computadores
short term traineeship, Sep. 2019 [bibTex]
Estágio de Verão: Arquitetura de Computadores
short term traineeship, Sep. 2019 [bibTex]