Total Publications: 165

  • Processing Systems for Deep Learning Inference on Edge Devices
    Mário Pereira Véstias,
    Convergence of Artificial Intelligence and the Internet of Things, Springer, Cham, May 2020
  • Deep Learning on Edge: Challenges and Trends
    Mário Pereira Véstias,
    Smart Systems Design, Applications, and Challenges, IGI Global, March 2020
  • High-Speed Viterbi Decoder
    Mário Pereira Véstias,
    Encyclopedia of Information Science and Technology, 5th edition, IGI Global, March 2020
  • Convolutional Neural Network
    Mário Pereira Véstias,
    Encyclopedia of Information Science and Technology, Fifth Edition,, IGI Global, March 2020
  • Field-Programmable Gate Array
    Mário Pereira Véstias,
    Encyclopedia of Information Science and Technology, Fifth Edition, IGI Global, March 2020
  • Advanced Methodologies and Technologies in Network Architecture, Mobile Computing, and Data Analytics (Advances in Computer and Electrical Engineering
    Mário Pereira Véstias,
    Viterbi Decoder in Hardware, IGIGlobal, October 2018
  • High-Performance Reconfigurable Computing
    Mário Pereira Véstias,
    Advanced Methodologies and Technologies in Network Architecture, Mobile Computing, and Data Analytics (Advances in Computer and Electrical Engineering) 1st Edition, October 2018
  • Adaptive Networks for on-Chip Communication
    Mário Pereira Véstias,
    Encyclopedia of Information Science and Technology, Fourth edition, Edited by Mehdi Khosrow-Pour, July 2017
  • Decimal Hardware Multiplier
    Mário Pereira Véstias,
    Encyclopedia of Information Science and Technology, Fourth edition, Edited by Mehdi Khosrow-Pour Publisher, July 2017
  • Encyclopedia of Information Science and Technology
    Mário Pereira Véstias,
    Adaptive Networks for on-Chip Communication, Mehdi Khosrow-Pour Publisher: , June 2017
  • Encyclopedia of Information Science and Technology
    Mário Pereira Véstias,
    High-Performance Reconfigurable Computing, Mehdi Khosrow-Pour Publisher: , June 2017
  • Encyclopedia of Information Science and Technology
    Mário Pereira Véstias,
    Decimal Hardware Multiplier, Mehdi Khosrow-Pour Publisher: , June 2017
  • Encyclopedia of Information Science and Technology
    Mário Pereira Véstias,
    Viterbi Decoder in Hardware, Mehdi Khosrow-Pour Publisher: , June 2017
  • Adaptive Networks-on-Chip
    Mário Pereira Véstias, Horácio C. Neto,
    Encyclopedia of Information Science and Technology, Third edition, IGI Global, January 2014
  • High-Performance Reconfigurable Computing
    Mário Pereira Véstias,
    Encyclopedia of Information Science and Technology, Third edition, IGI GLobal, January 2014
  • Decimal Multiplication
    Mário Pereira Véstias, Horácio C. Neto,
    Encyclopedia of Information Science and Technology, Third edition, IGI Global, January 2014
  • Decimal Division Using the Newton–Raphson Method and Radix-1000 Arithmetic
    Mário Pereira Véstias, Horácio C. Neto,
    Embedded Systems Design with FPGAs, Springer, January 2013
  • Dynamically Reconfigurable Networks-on-Chip using Runtime Adaptive Routers
    Mário Pereira Véstias, Horácio C. Neto,
    Dynamic Reconfigurable Network-on-Chip Design: Innovations for Computational Processing and Communication, IGI Global (IGI), USA, April 2010
  • Comparing Local and Global Optimization Techniques to Solve the Co-synthesis Problem
    Mário Pereira Véstias, Horácio C. Neto,
    TechnicalReport, INESC-ID Lisboa, n. 4, October 1999
  • A Fast Simulated Annealing Scheduling Algorithm for Heterogeneous Multiprocessor Architectures
    Mário Pereira Véstias, Horácio C. Neto,
    TechnicalReport, INESC-ID Lisboa, n. 3, September 1999
  • Real-Time Scheduling
    Mário Pereira Véstias,
    TechnicalReport, INESC-ID Lisboa, n. 2, November 1998
  • Fixed Priority Preemptive Scheduling
    Mário Pereira Véstias,
    TechnicalReport, INESC-ID Lisboa, n. 3, July 1998
  • Projecto ao Nível do Sistema
    Mário Pereira Véstias,
    TechnicalReport, INESC-ID Lisboa, n. 4, April 1997
  • Os Actuais Sistemas de Co-Projecto e Co-Síntese
    Mário Pereira Véstias,
    TechnicalReport, INESC-ID Lisboa, n. 3, March 1997
  • Desenvolvimento do Processo de Backannotation num Fluxo de Projecto de ASICs Semipersonalizados em Tecnologia de Agregados de Células Lógicas
    Mário Pereira Véstias,
    TechnicalReport, INESC-ID Lisboa, n. 1, December 1994
  • Caracterização dos Processos Tecnológicos do IMS e da ATMEL
    Mário Pereira Véstias,
    TechnicalReport, INESC-ID Lisboa, n. 2, May 1994
  • Hardware/Software Co-Design Methodology for Programmable Dataflow Architectures
    Mário Pereira Véstias, Instituto Superior Técnico, Universidade de Lisboa, Thesis, July 2002