Positions: 3
Research Grant (BI)
Project LION-BI|2024/569
Type of position: Research Grant (BI)
Duration: 12 months
Deadline to apply: 2024-09-19
DescriptionThe work will consist in improving the correctness of selected LLVM optimization algorithms.
For example, NewGVN is known to have several architectural flaws. Other optimizations were also not designed before undefined behavior in intermediate representations was well understood.
We aim to gain a better understanding of the correctness (or lack thereof) of LLVM optimizations.
Contact email: rh@inesc-id.ptProject Scalable Cosmos Consensus-BI|2024/568
Type of position: Research Grant (BI)
Duration: 3 months
Deadline to apply: 2024-09-17
Description
The objective of this research grant is to do research and development in the interactions between distributed and single-process applications with the file system.
The work plan includes studying existing systems; analyse their reliability, efficiency and expressivity; and implement test-cases and tools to exercise potential corner cases identified.
Contact email: rh@inesc-id.pt
Master's Grant
Proj. ATE – Refª C644914747-0000023-BI|2024/556
Type of position: Master's Grant
Duration: months
Deadline to apply: 2024-09-20
DescriptionThe objective of this grant position is to support the research team of ATE-PRR in activities related to the development of the NILM module electronics, including the following tasks:
Task 1: Establish hardware and software requirements of a NILM module (1 month)
Determine the system requirements (sampling rate, number of bits, power subsystem, etc…) to achieve successful load disaggregation up to 60 A at 230 VAC. Develop and propose an architecture for the NILM module that is cheap and meets the technical specifications. It is of paramount importance to end up with a cheap solution (10€ maximum) because the module is to be installed in tens of thousands of households. This will require a thorough procurement of components, namely a power meter integrated circuit.Task 2: NILM module development (4 months):
Design the required module electronics and its printed circuit board (PCB). The PCB must fit in a conventional circuit breaker box. Develop the readout and computing firmware for the selected microcontroller. Assemble and test the NILM module using scaled, synthetic, resistive, capacitive and inductive loads. These tests will allow fine calibration of the module, namely of the RMS voltage and current and the real, reactive and apparent power estimates. Test the module with real loads using a current transformer (CT) sinking currents up to 60 A, 230 V. Develop the Wi-Fi software interface and the software for cloud storage, results display, real-time monitoring and historical data analysis. Test the complete NILM module, including the cloud segment, using real loads.Task 3: Integration of the NILM module and User Manual (1 month):
Collaborate with the team developing the disaggregation algorithms to assess the functionality of the complete system. Evaluate the feasibility of moving parts of the disaggregation software to the NILM module and executed by its microprocessor (edge processing). The goal is to improve the overall performance and capabilities of the module, allowing for more efficient data collection and, most importantly, reducing data throughput to the cloud, which is costly. Write the NILM module’s User Manual and a document with detailed installation instructions.Task 4: Reporting and Paper (during all 6 months):
Develop and maintain documentation related to all aspects the NILM module development. Summarize the findings from each task and collaborate with the project team to prepare manuscripts for publication in scientific journals.
Contact email: rh@inesc-id.pt