Eficiência energética e desempenho para sistemas ambarcados e de HPC com CGRAs customizados (PEPCC)
Type: National Project
Duration: from 2018 Aug 01 to 2021 Sep 30
Financed by: FCT
Prime Contractor: INESC-TEC (Other)
Many applications in HPC and ES have a small number of regular computational kernels that account for most of the execution time and energy consumption. The manual introduction of reconfigurable accelerators requires significant design time and hardware expertise. It is vital to not compromise developer productivity by requiring manual hardware development and source code alterations. Therefore, this project focuses on approaches that only require knowledge about the program binary code and its runtime behavior. The goal of this project is to devise efficient techniques for dynamically mapping computations extracted from execution behavior to the resources of specialized reconfigurable accelerators. The techniques will identify at runtime the hotspots of program execution. They are then optimized and mapped to CGRAs tailored to the actual set of executing kernels. Whenever one hotspot needs to be executed, the accelerator is transparently invoked. The use of specialized CGRAs reduces resource usage and improves performance. The project will apply these concepts in the ES and HPC domains.
- INESC-ID (Other)
- INESC-TEC (Other)