Accelerator Framework for Real-Time 3D Reconstruction of Underwater Caves (3D - CAVE)

Type: National Project Project

Duration: from 2023 Mar 10 to 2024 Sep 09

Financed by: FCT

Prime Contractor: R - INESC-ID Lisboa (Other) - Lisboa, Portugal

Project Web Site:

The project proposes the following objectives and research directions:- Creation of a repository of real underwater cave footage and IMU data. The obtained datasets will comprise multiple camera/IMU arrangements, by considering both monocular/stereo front-facing setups and outward radial setups (with four or more camera/IMU nodes). Several lighting arrangements will also be studied to optimize the conditions for data acquisition. The resulting repository will not only be used as the base for the algorithmic research and prototype development that is planned for this project, but it will also be deployed as an open dataset repository for scientific research, also complementing available VI datasets with underwater cave sensor data and image sequences.- Investigation of new algorithmic features to enable the use of existing state-of-the-art VI-SLAM methods (e.g., ORB-SLAM3) for the 3D reconstruction of accurate volumetric models of underwater caves, including 1) new reference point tracking methods, resilient to image deformation from light refraction and scattering, caused by the presence of water and the use of artificial lighting; and 2) innovative image cleaning algorithms, based on AI/ML classification methods to identify and remove suspension particles that may interfere with the tracking algorithm.- Research on new reconfigurable architectures for real-time VI-SLAM in embedded FPGA systems. A design space exploration approach will be used to define several architecture configurations and topologies to provide specialized acceleration considering the investigated algorithmic innovations. The resulting architectures will leverage and adapt several state-of-the-art acceleration techniques (such as spatial computation, time-multiplexing, and data streaming) to make efficient use of the underlying FPGA platform resources and extract as much performance as possible within the available power budget.

Principal Investigators