Sahar Moradi Cherati, one of our PhD Students in High-Performance Computing Architectures and Systems (HPCAS) was awarded the “Best Student Paper Award” during the IEEE Computer Society Annual Symposium on VLSI (Very-large-scale integration).

Sahar’s work “MSDF-Based Hardware Accelerators for Energy-Efficient Neural Networks in Edge Computing Applications”, is co-authored by her supervisor HPCAS researcher Leonel Sousa. It explores a new approach to designing Multiply-Accumulate (MAC) units using Most Significant Digit First (MSDF) arithmetic. The goal is to enhance neural network performance on edge devices by minimising latency and effectively managing energy and area constraints.

“It’s encouraging to see this work recognised, and I’m grateful for the support and guidance I’ve received throughout this work.” adds Sahar.

For over three decades the Symposium has been a unique forum promoting multidisciplinary research and new visionary approaches in the area of VLSI. The 2025 Symposium explores emerging trends and novel ideas and concepts covering a broad range of topics, from VLSI circuits, systems and design methods, to bringing VLSI design to new areas and technologies. This year it was co-located with the event “Empowering Women in Hardware & Chip Design: Challenges & Success Stories” organised by #SMART4Women.